UC San Diego

In this dissertation, millimeter-wave transmitter systems and a bidirectional transceiver front-end circuit are presented. To reach high data rate for next generation communication systems, complex modulation schemes such as QAM are necessary to take advantage of the signal bandwidth. In a transmitter system, higher-order QAM not only requires the PA to operate in linear region, while the output power and efficiency are maintained, but also requires the calibrations for the modulator to minimize the EVM. The rst portion of the dissertation presents the dual-band (Q-band/W-band) direct-conversion transmitter in 120-nm SiGe BiCMOS process. The dual-band feature is the use of the proposed transmission- line-based dual-band load on RF and LO amplifiers to allow the transmitter to operate at two distinct bands. Furthermore, this dual-band transmitter applies a new I/Q correction techniques, which calibrates amplitude and phase mismatch from analog baseband, and can achieve the sideband suppression ratio above 40 dBc at both Q-band and W-band. The EVM improvement can be clearly found from the constellation diagram at both bands.

In addition, a high-efficiency PA must introduce nonlinear terms and degrade the EVM. Therefore, in addition to the I/Q mismatch, other errors from a transmitter such as LO leakage, AM-AM, AM-PM distortion and memory effects must be calibrated to improve the EVM. The second portion of this dissertation discusses the demonstrations of 45-GHz and 94-GHz transmitter systems with digital predistortion (DPD) to compromise the linearity/efficiency trade-off. The 45-GHz transmitter system uses the second portion SiGe modulator and a two-by-two PA/antenna array, which PAs are implemented in 45-nm SOI CMOS process. The digital signal is programmed in an FPGA-based processor, so an all silicon-based solution is verified at 45 GHz (Q-band). The 94-GHz transmitter system uses a two-step frequency conversion architecture to send the modulated data to

94-GHz band and a two-by-four PA/antenna array, which is implemented in 45-nm SOI CMOS process. The nonlinearities and errors of the transmitted data are significantly predistorted/calibrated and the EVM is greatly improved by DPD.

The third portion of this dissertation presents a 71 to 86-GHz (E-band) bidirectional transceiver front-end circuit implemented in 90-nm SiGe BiCMOS process. The time-division duplex architecture avoids transmit/receive switches through the use of transistor biasing in the signal path to minimize high-frequency loss. The low-noise amplifier (LNA) and power amplifier (PA) are combined into a novel PA/LNA circuit, which alleviates the parasitic loading of each circuit. In transmit mode, the bidirectional transceiver transmits a maximum saturated power of 11 dBm at 78 GHz with a 3-dB bandwidth from 71 to 86 GHz. In receive mode, the maximum 30.6-dB conversion gain and the minimum 6.6-dB noise figure are measured at 73 GHz.