UCLA

The Synaptic-Resistor and Neuristor Integrated Circuits (SNIC) framework represents a significant advancement in neuromorphic computing, achieving unprecedented energy efficiency, scalability, and adaptability. Central to this work is the introduction of capacitor-less CMOS neuron circuits, which replace traditional capacitors with innovative transistor-based mechanisms. This design not only eliminates the scalability limitations of capacitor-based circuits but also achieves ultralow power consumption, compactness, and enhanced adaptability to environmental variations. These neuron circuits can be dynamically tuned to operate under varying conditions, making them versatile for diverse applications while retaining biological plausibility. Complementing this is the heterogeneous integration of synaptic resistors (synstors), which combines advanced memory materials with CMOS technologies to enable real-time learning and inference. This innovative approach mimics the adaptive and efficient nature of biological synapses, offering unparalleled flexibility and energy efficiency. While challenges such as fabrication complexity and device variability remain, the SNIC framework demonstrates energy efficiencies orders of magnitude higher than state-of-the-art hardware. This positions SNIC as a transformative solution for resource-constrained applications, including robotics, edge AI, and IoT. By bridging biological inspiration with cutting-edge engineering, SNIC establishes a scalable, energy-efficient platform poised to address the growing computational demands of intelligent systems and drive breakthroughs in sustainable, large-scale computing across a range of industries.