The THz band (0.1 - 10 THz) holds several applications such as high-speed communication,3D imaging radars, and spectroscopy. A high-sensitivity receiver is crucial for fully utilizing this broad untapped spectrum. Advancements in silicon technologies now enable transistors with maximum oscillation frequency (fmax) beyond 400 GHz, enabling silicon THz ICs. This thesis presents two ultra-wideband low noise amplifiers in the THz band, designed using silicon technologies. Several key concepts are discussed, such as optimal bias selection, passive circuit modeling, bandwidth enhancement, circuit-EM co-simulation approaches, and THz probe-based testing. The first design is a 7-stage cascaded common-emitter LNA with more than 80 GHz of 3-dB bandwidth, covering the entire WR5 frequency band (140-220 GHz). It has a measured peak gain of 15.5 dB and a simulated NF of 6.8 dB at 180 GHz, with 46 mW DC power consumption, and is implemented in the IHP 130 nm SiGe BiCMOS process. The second design is a cascaded 12-stage common-emitter LNA with 45 GHz of 3-dB bandwidth, from 190 GHz to 235 GHz. This design achieves a peak gain of 216 GHz, a sub 10 dB noise figure, DC power consumption of 19.9 mW, and is implemented in GlobalFoundries 22nm FDSOI process.