This is a programmer's manual of HIDE, Hurwitz Interconnect Delay

Pre-2018 CSE ID: CS2000-0662

This report provides the theoretical foundation to STAR program, a linear network reduction software kit. Y-$\Delta$ transformation in s-domain is the essential part of the reduction engine of the program. We have extended it to handle current/voltage sources and K elements. Coming with it are node ordering algorithm and some novel numerical stability control techniques. They play an important role in the overall reduction flow by providing the consistent accuracy in program outputs. [1] is dedicated to the applications to the program.

Pre-2018 CSE ID: CS2002-0706

GRYD is a multi-port linear RCLK-VJ network reduction software package. The package features: 1. an efficient linear network reduction engine based on the generalized Wye-Delta transformation algorithm; 2. GRYD simulator, which evaluates transient response waveforms to typical input signals, e..g., impulse, piecewise linear, and expotential functions; 3. GRYD pole analyzer, which evaluates the system transfer function matrix, poles and zeros, and a reduced-model stabilization mechanism; 4. GRYD network synthesizer, which realizes the reduced network and outputs a SPICE-compatible netlist file. The reduction engine takes as input a SPICE netlist file and generates a reduced admittance network in s domain. An important feature of the reduction engine is that each reduced admittance is a rational function of s, and the transfer functions of reduced network are exact up to a user-specified order beta. This user's manual covers both the engine and the applications.

Pre-2018 CSE ID: CS2003-0759

GRYD is a multi-port linear RCLK-VJ network reduction software package. The package features:
1. an efficient linear network reduction engine based on the generalized Wye-Delta transformation algorithm;
2.GRYD simulator, which evaluates transient response waveforms to typical input signals, e..g., impulse, piecewise linear, and expotential functions;
3. GRYD pole analyzer, which evaluates the system transfer function matrix, poles and zeros, and a reduced-model stabilization mechanism;
4. network synthesizer, which realizes the reduced network and outputs a SPICE-compatible netlist file. The reduction engine takes as input a SPICE netlist file and generates a reduced admittance network in s domain. An important feature of the reduction engine is that each reduced admittance is a rational function of s, and the transfer functions of reduced network are exact up to a user-specified order beta. This programmer's manual covers both the engine and the applications.

Pre-2018 CSE ID: CS2003-0758

This is a user's manual of HIDE, an efficient RC Interconnect Delay Evaluation package. The program features: Delay evaluation using a user-defined delay threshold; Rise time evaluation between given start and end delay threshold; Waveform evaluation; Equivalent load generation; Hspice netlist generation for verification; Moment generation.

Pre-2018 CSE ID: CS2000-0661