In this dissertation, we develop and explore very-high-performance power conversion systems for emerging applications that require high efficiency and high power density simultaneously, such as large-scale data center power delivery and mobile computing on portable and wearable electronics.

This work focuses on a topological effort to drastically improve the performance of existing power electronics. In particular, a hybrid approach is adopted, in which both inductors and capacitors are used in the voltage conversion and power transfer process. Compared to conventional switched-capacitor (SC) converters, the augmenting inductors can greatly reduce or eliminate the capacitor charge sharing loss, and thus improve the energy utilization of the capacitors without sacrificing efficiency. This process is called soft-charging operation. In combination with other potential advantages such as soft switching and voltage regulation, hybrid SC converters show promise in the development of future high-performance power electronics systems.

This dissertation explores hybrid SC converters from three main aspects: fundamental limits and topology comparisons, practical circuit implementation challenges, and high-performance hardware demonstrations. We start by analyzing the reactive power processed by the passive components of hybrid SC converters operating in resonant mode. This analysis is applied to express and optimize the total passive component volume of resonant switched-capacitor (ReSC) converters. To compare different ReSC topologies, a normalized passive volume parameter is proposed for simple and fair comparison. This normalized passive volume parameter, along with a normalized switch stress parameter (based on switch VA ratings), can be used to visualize and compare the passive and active component utilizations among different topologies, offering a framework to compare the relative performance of different topologies.

The large number of floating switches and flying capacitors pose great challenges in practical circuit implementations. Several bootstrap and charge-pump based techniques are developed to provide gate drive power to the floating switches in a compact and efficient manner. Compared to conventional isolated dc/dc power supply chips, the proposed circuits have a simple structure and operating principle, and can be implemented with a small number of diodes, capacitors, and LDOs, leading to less occupied board area and lower implementation cost. Another crucial practical challenge is flying capacitor voltage balancing. In unbalaced operation, capacitor voltages deviate from their nominal values, potentially resulting in system failure. We experimentally investigate the origins of the voltage imbalance in practical implementations of flying capacitor multilevel (FCML) converters and present corresponding solutions. It is found that an FCML converter with an even number of levels has significantly better capacitor balancing than one with an odd number of levels, due to better inherent immunity to circuit non-idealities.

With the theoretical analysis tools and the practical circuit techniques developed above, a number of high-performance discrete hardware prototypes are designed in the context of 48 V power delivery architecture for modern data centers. Based on a novel cascaded resonant topology, a 48-to-12 V, 4-to-1 fixed-ratio, intermediate bus converter is built with 99% peak efficiency and 2500 W/in3 power density. To further increase the conversion ratio without increasing circuit complexity, the concept of multi-phase operation is introduced, along with a 6-to-1 cascaded series-parallel topology and an 8-to-1 multi-resonant-doubler topology. In addition to fixed-ratio ReSC converters, a regulated multi-level binary hybrid converter for direct 48 V to 1-2 V point-of-load applications is also developed. All of the hardware prototypes achieve the best in-class efficiency and power density simultaneously, reflecting the great potential of hybrid and resonant switched-capacitor converters for future power conversion systems.

Single-phase power converters enable people to connect any electronic device to the ac grid. As the electricity demand of our world continues to grow, it is crucial to continually research and develop novel power electronic technologies that have improved performance. Specifically, traits of minimal power loss, high volumetric power density, high gravimetric power density, high levels of reliability, and long lifetimes are desired.

In the first part of this thesis, a novel two-stage power converter design is proposed for the application of level-2 electric vehicle on-board charging. For the ac-to-dc rectification stage, a hybrid-switched capacitor converter, which utilizes the ultra-high energy densities of class two ceramic capacitors to minimize the passive component sizing of the converter, is proposed. For the energy buffer stage of the on-board charger, an active buffer topology that minimizes the system's physical volume and weight without compromising efficiency is presented. The active buffer topology in the electric vehicle charger is further investigated, with a novel control and circuit topology introduced that significantly reduces any voltage and current ripple along the dc-link.

In the second part of this thesis, a novel two-stage inverter solution is proposed for a residential microinverter. The inverting stage of the microinverter is divided into two parts: a step-up stage and an inverting stage. Both parts are implemented with hybrid switched-capacitor converter topologies to (1) reduce system volume through leveraging the high energy densities of capacitors and (2) increase system efficiency by utilizing lower voltage switches with high figures of merit and soft-switching techniques. The passive component volume and switching stress of the step-up stage are theoretically analyzed and compared to other converter topologies, showcasing it as a practical converter choice for the microinverter application space. This two-part inverting stage creates a high voltage dc bus where the energy buffer can be placed in the system. This reduces the required buffer capacitance, enabling the engineer to have a broader range of capacitor choices to design a more reliable and energy-dense system.

Overall, this thesis showcases the design and utilization of several hybrid switched-capacitor converters, active buffer topologies, and control in the single-phase application area. Modeling and theoretical analysis techniques of power converter volume and power stress are explained in detail. High-performance hardware prototypes, experimental results, and test setup designs are included.

Innovations within power electronics are necessary to enable future electric aircraft and space exploration. In these aerospace applications, power converters must be light-weight, efficient and reliable. Conventional, inductor-based, power electronics tend to be heavy, and have high switch stress making them difficult to implement in these applications. In this thesis, hybrid switched-capacitor converters are explored as they utilize energy-dense capacitors as the primary energy storage element, and also decrease the voltage stress of the switches. The basics of hybrid switched-capacitor converters are covered, with a focus on why these topologies are suitable for aerospace applications. Next, the losses of the capacitors, the main building block of these converters, are characterized and a model is proposed which allows for simple loss estimation. Then, the design and flight qualification of a hybrid switched-capacitor converter is discussed, showcasing a converter with high efficiency, power density and reliable control. Moreover, the safe control of hybrid switched-capacitor converters during shutdown is described, with a model proposed which allows designers to understand the shutdown of the converter and trade-offs in different shutdown techniques. Hybrid switched-capacitor converters are motivated for their use in harsh space environments, where radiation effects make designing high performance converters challenging. Two different converters designed for space applications are then described, utilizing techniques such as partial power processing to minimize passive component mass. Overall, this thesis showcases the design of several high performance hybrid switched-capacitor converters, but also introduces models and comparison frameworks to allow future designers to better understand the design and operation of hybrid switched-capacitor converters in aerospace applications.

Hybrid switched-capacitor (SC) converters have attracted increased attention due to their potential to provide improved solutions with higher efficiency and higher power density compared to conventional designs. As an emerging class of power converters, hybrid SC converters can leverage the greatly superior energy density of capacitors compared to inductors, while simultaneously benefiting from the improved figure-of-merit of low-voltage switching devices over their high-voltage counterparts. This dissertation explores the circuit topologies, control techniques, and analytical models for hybrid SC converters to enable higher performance.

First, this dissertation models and analyzes the effect of finite terminal capacitances on the performance of pure and resonant SC converters. By establishing a general output impedance model for each type of converter, the first part of this dissertation reveals that insufficient terminal capacitances can lead to a dramatic increase in output impedance and cause a considerable efficiency drop. Based on this analysis, a multi-resonant control technique is proposed to reduce terminal capacitances without sacrificing efficiency.

Second, this dissertation explores high-performance hybrid SC converters for direct 48 V to point-of-load (PoL) power conversion in data centers. High-performance processors (e.g., graphics processing units [GPUs], central processing units [CPUs], application-specific integrated circuits [ASICs], etc.) serve as the engine of data center computing platforms and the foundation for technical progress in areas such as artificial intelligence and autonomous vehicles. Due to the fast-growing demand for greater computational power, the electric power consumption of processors has increased dramatically in recent years and is approaching 1000 W, with core logic voltages below 1 V and peak current demand beyond 1000 A. At such high current levels, the large power distribution network (PDN) of the existing two-stage lateral power delivery architecture can lead to a dramatic voltage drop and unacceptable conduction losses, which significantly limits processor performance, reduces system energy efficiency, and hinders data center decarbonization and densification.

In pursuit of a more efficient and compact alternative to the existing solution, the second part of this dissertation introduces a family of high-performance 48-V-to-PoL hybrid SC voltage regulators, named the switching bus converter. Based on a single-stage vertical power delivery (VPD) architecture, the switching bus converter significantly reduces the PDN size and power conversion losses. Moreover, the proposed switching bus converter family strategically merges two or multiple conversion stages through switching buses, a type of intermediate bus with a switching voltage. Compared to the existing dc-bus-based architecture, the proposed switching-bus-based architecture does not require dc bus capacitors, reduces the number of switches, and ensures complete soft-charging operation. In addition, this dissertation conducts a comparative performance analysis of different regulated hybrid SC topologies, which reveals that a larger SC conversion ratio is advantageous for achieving higher performance. Through the two-phase operation of the series-capacitor buck modules, the proposed switching bus converter extends the maximum duty ratio and enables a larger SC conversion ratio. Various circuit topologies from the switching bus converter family and their hardware prototypes are presented in this dissertation, including a 1500-A high-efficiency prototype and a high-density prototype with a practical form factor for VPD, which push the performance boundary for 48-V-to-PoL power conversion.

Ac-dc (and dc-ac) power converters are the interfaces between the electrical grid and thesystems for emerging applications such as electric vehicle (EV) charging, renewable energy source integration, data center power delivery, consumer electronics and numerous other applications. In this dissertation, new circuit topologies and control techniques to improve the performance for both single-phase and three-phase grid-tied converters are explored for three major conversion scenarios: high power bidirectional single-phase ac-dc converters for EV charging and data center applications, low power single-phase ac-dc converters for consumer electronics, and high power three-phase ac-dc converters. For single-phase conversion, the challenge of twice-line frequency energy buering is addressed with active buering techniques that can signicantly reduce the required capacitor size compared to conventional solutions. Through the development of active buers with systematic multi-objective optimization methods and associated advanced digital control, the energy utilization ratios of the passive components are much improved, and the system losses are optimized. For threephase conversion, control and modulation techniques to reduce computational complexity and inductor current ripple are proposed and validated. The proposed circuit topologies and control techniques for both single-phase and three-phase are all validated with high performance hardware demonstrations. Some of the highlighted ones in this dissertation are: a 6 kW, 400 Vdc single-phase liquid-cooled EV charger with optimized series-stacked buer, achieving record power density; a 6 kW 400 Vdc three-phase multilevel rectier with advanced digital control techniques; an active single-phase buer with the smallest reported capacitor size for 2 kW, 400 Vdc inverters; a compact active buer for 65 W USB-C charger.