III-Nitride based devices have made great progress over the past few decades in electronics and photonics applications. As the technology and theoretical understanding of the III-N system matures, the limitations on further development are based on very basic electronic properties of the material, one of which is electron scattering (or ballistic electron effects). This thesis explores the design space of III-N based ballistic electron transistors using novel design, growth and process techniques. The hot electron transistor (HET) is a unipolar vertical device that operates on the principle of injecting electrons over a high-energy barrier (ϕBE) called the emitter into an n-doped region called base and finally collecting the high energy electrons (hot electrons) over another barrier (ϕBC) called the collector barrier. The injected electrons traverse the base in a quasi-ballistic manner. Electrons that get scattered in the base contribute to base current. High gain in the HET is thus achieved by enabling ballistic transport of electrons in the base. In addition, low leakage across the collector barrier (IBCleak) and low base resistance (RB) are needed to achieve high performance. Because of device attributes such as vertical structure, ballistic transport and low-resistance n-type base, the HET has the potential of operating at very high frequencies. Electrical measurements of a HET structure can be used to understand high-energy electron physics and extract information like mean free path in semiconductors.

The III-Nitride material system is particularly suited for HETs as it offers a wide range of ΔEcs and polarization charges which can be engineered to obtain barriers which can inject hot-electrons and have low leakage at room temperature. In addition, polarization charges in the III-N system can be engineered to obtain a high-density and high-mobility 2DEG in the

base, which can be used to reduce base resistance and allow vertical scaling.

With these considerations in mind, III-N HETs had been explored in our research group earlier and gave us encouraging common base IV characteristics. Common emitter transistor operation was, however, not observed due to high RB and IBCleak. This thesis discusses several design and process challenges associated with the HET in general and specific to the III-N system. Many of these challenges like RB, IBCleak, and high energy injection were solved using novel combinations of hetero-structure and polarization engineering, device fabrication, and growth. Common-Emitter operation (with current gain ~ 0.1) was demonstrated in III-N HETs for the first time using injection and collector barriers induced by AlGaN and InGaN polarization-dipoles. In order to improve current gain, different parts of the III-N HET base which contribute to scattering, were identified. A novel base contact methodology using selective etching of GaN with respect to AlN was developed to enable base scaling. Aggressive scaling of all parts of the base was then used to increase current gain. A maximum gain of ~3.5 was demonstrated using a 1.5nm AlN layer as the emitter, 2nm GaN base and 2nm In0.2Ga0.8N as the collector P-D. This is the highest reported DC current gain in III-N HETs to date. The III-N HET structure was also used to extract the mean free path of hot-electrons (λmfp = 6nm) in GaN. The extracted value of mean free path has significant implications for any scaled devices which use ballistic or quasi-ballistic electron transport. We believe that the work presented in this dissertation provides a pathway for high gain in III-N HETs and eventual realization of their high frequency potential.

Post the commercialization and widespread use in light emitting diodes (LEDs), heterostructures of III-nitride semiconductors (GaN, AlN, InN, and BN) with their alloys, have shown immense promise in applications not limited to optoelectronics, but ranging from high power and high frequency electronics to plasmonics, sensor technology and quantum computing. While the superior properties of electrons and the two-dimensional electron gas (2DEG) have peaked a great deal of attention on this materials system, similar levels of advancements in p-type III-nitrides are required to tap into the complete benefits this semiconductor family can potentially provide. Like in most other wide-bandgap materials, the poor performance of p-type material in III-nitrides has led to only a few studies reported on p-channel III-nitride electronic devices. The use of p-type superlattice (SL) is valuable for III-nitride semiconductor-based p-channel Field effect transistors (pFETs) and LEDs because the polarization effects create a periodic oscillation of the energy bands, enhancing the ionization of the deep acceptors. Thus, the use of Mg-doped GaN/AlGaN SL is a pathway to get high hole concentration and mobility simultaneously, and pFETs engineered around a GaN/AlGaN SL have demonstrated record electrical performance.

The present study will systematically explore the electrical properties of epitaxially grown p-type Ga-polar and N-polar, modulation doped and uniformly doped GaN/AlGaN, and GaN/AlN/AlGaN superlattices (grown using the MOCVD growth technique). Following this, the discovery of a novel acceptor trap, proposed at 0.8 eV above the valence band of GaN, will be presented with simulations and experiments. The implications of this trap level, and its impact as the source of holes in dopant-deficient systems will be elucidated. This study will also explain in detail how charge balance is achieved in recent p-channel III-nitride electronic and optoelectronic devices. A detailed methodology will also be presented to predict and explain the mobility and high sheet concentration of holes in p-type III-nitride systems. p-type III-nitride material with record sheet resistance as low as 1.5 kΩ/sq will be shown. This work concludes with the development of highly doped p-GaN regrowth for use in p-channel III-nitride FETs with record normally-off performance.

GaN-based high electron mobility transistors (HEMTs) and monolithic microwave integrated circuits (MMICs) have emerged as a leading technology for power amplification at high frequency. N-polar GaN-based HEMTs are very promising to achieve high output power and high efficiency for solid-state millimeter wave power amplifiers. The advantages come from both the GaN material, and the polarization engineering enabled by the N-polar orientation. Harnessing these advantages, Romanczyk et al. reported a record-high 8.84 W/mm power density at 94 GHz from a N-polar GaN deep-recessed HEMT with a SiN gate dielectric.To further boost the high-frequency and high-power performance in N-polar GaN HEMTs, improving the gate structure is critical to enhancing both stability and gain during device operation. This dissertation is devoted to the evaluation of gate structures on N-polar GaN including MIS- and Schottky structures. Part of the evaluation is conducted through the MIS-capacitor and Schottky diode structures to understand the interface properties. Another part of the evaluation wis in the form of N-polar GaN deep recess HEMTs to pursue the high performance at 94 GHz. A series of MIS- capacitors consisting of SiN and AlSiO with different thicknesses on N-polar GaN were fabricated to investigate their interface states. An improved model combining the effects from interface states and bulk hole traps is proposed to extract the interface state density accurately. Based on the model, the Dit can be obtained by extrapolating the trap density to a zero-thickness dielectric. The average Dit value and the bulk trap parameters can be thereby quantified. The results, model and analysis presented provide new insights into studying Dit of various dielectrics on GaN and other wide-bandgap semiconductors. Schottky barrier diode of ruthenium (Ru) deposited by atomic layer deposition on N-polar GaN was investigated. The Schottky diodes showed near-ideal thermionic current behavior under forward bias and reverse bias at various temperatures. The barrier height was extracted to be 0.77 eV at room temperature. The combination of the 0.77 eV barrier and thermionic current characteristic resulted in < 2 µA/cm2 reverse current at -5 V, which is a record-low value for N-polar GaN Schottky diodes. ALD Ru gate was adopted into the N-polar GaN deep recess MIS- and Schottky HEMTs. The ALD Ru effectively fills the narrow T-gate stems aiding realization of shorter gate lengths with lower gate resistance than in prior work. For the ALD Ru MIS-HEMTs, the gate length was scaled down to 48 nm resulting in the demonstration of a record-high 8.1 dB linear transducer gain measured at 94 GHz by load-pull techniques. This increased gain has enabled a record 33.8% power-added efficiency (PAE) with an associated output power density (PO) of 6.2 W/mm. The Ru/N-polar GaN Schottky-HEMT operating at W-band has also shown good large signal performance. The fabricated Schottky HEMT with LG of 60 nm has a high peak extrinsic transconductance of 798 mS/mm with a gate leakage in pinch-off below 3  10-4 A/mm at VDS = 5V. The Schottky-HEMT shows high PAE of 27.1% and PO of 4.87 W/mm at 94 GHz and VDS,Q = 16V. The peak PAE is 31.8% with associated PO of 3.31 W/mm at VDS,Q = 12V.

GaN-based high electron mobility transistors (HEMTs) have emerged to be a leading technology for RF millimeter-wave application. While GaN technologies utilizing the Ga-polar (0001) orientation have shown good performance in W-band, its performance is saturated due to the DC-RF dispersion and the limit on device gate to channel distance. As an alternative, the N-polar (000-1) GaN deep recess HEMTs can overcome those disadvantages and outperform Ga-polar GaN devices with excellent output power and efficiency at 94 GHz. However, the ability to enhance efficiency of GaN-based RF transistor simultaneously with high output power density is still limited by the gain of the device, making high gain a critical need at W-Band at mm-wave frequencies.Works in this dissertation focus on improving gain and efficiency of N-polar GaN deep recess HEMTs. A predictive physics-based model on transport has been proposed to inspect the performance N-polar GaN RF transistor and understand electron transport in devices. The modelling results show good agreement with experimental data on device DC transfer characteristics and RF cut-off frequency. After understanding the predictive behaving manner of the devices, effects on fringing capacitance from ex-situ SiN passivation and GaN cap layer have been studied to evaluate electrostatics of N-polar GaN deep recess devices. With knowledge acquired on transport and device electrostatics, thin GaN cap layer (20 nm) and Atomic Layer Deposition (ALD) Ru gate have been implemented with great commercial N-polar GaN-on-sapphire epi to improve the device gain. The fabricated GaN-on-Sapphire devices demonstrated record 94GHz large signal performance with high linear transducer gain of 9.65 dB, enabling excellent performance at 12 V with record 42% power-added efficiency (PAE) with associated 4.4 W/mm of output power density. Furthermore, at 8 V the device demonstrated even higher PAE of 44% with associated 2.6 W/mm of output power density. After 20 nm PECVD SiN passivation, devices show very high output power density of 5.83 W/mm with a high PAE of 38.5% at 94 GHz. The excellent results demonstrate the great potential of N-polar GaN-on-sapphire technology for mm-wave application with simultaneous high efficiency and power density. Strain engineering on GaN has also been explored for improving the device gain. Both relaxed InGaN channel and strain GaN channel were proposed for electron velocity enhancement. The GaN/InGaN HEMT with a relaxed InGaN channel has been fabricated utilizing a porous GaN buffer achieved by the selective and controlled electrochemical etch of GaN. The results show ~70% of InGaN relaxation relative to GaN and ~10% 2DEG mobility enhancement with respect to the strained InGaN channel. For strained GaN channel, electron effective mass in GaN under the biaxial tensile strain was calculated using first principal DFT calculation. The effect of biaxial tensile strain on device performance of GaN HEMT are also investigated. The results demonstrated the enhanced electron velocity over 15% with 4% compressive biaxial strain and improvement in both DC and RF performance of the transistor with the improved electron velocity.

Although MOCVD is regarded as the preferred growth method for commercial grade nitride-based semiconductor devices, there are still certain applications for which MBE may be utilized. Current record-performing N-polar HEMTs are grown by MOCVD which must use miscut SiC and sapphire substrates. The growth conditions employed by MBE, however, enable growth of N-polar GaN on non-vicinal substrates. MOCVD grown GaN-on-SiC N-polar HEMTs typically have a threading dislocation density on the order of 108 cm-2. Amplifiers biased in class-A mode operate at a high source-to-drain quiescent current. High current in a material with a high density of scattering centers (such as dislocations) may lead to power dissipation in the form of heat which can impede device efficiency. MBE grown N-polar HEMT epi-structures on low dislocation density bulk GaN substrates may improve this efficiency. Furthermore, the low temperature growth used by MBE enables thicker coherently strained AlN interlayers, or back-barriers, which can mitigate the effects of alloy scattering in the 2DEG channel. Although N-polar GaN grown on bulk GaN by MBE typically results in a surface riddled with V-defects, this work demonstrates suppression of V-defects by initiating growth with just 2 nm of AlN. It was shown that the generation of these pits may be attributed to impurities on the regrowth interface. InGaN grown by MBE has the advantage of growing thick layers without generating V-defects on the surface. Furthermore, the lower growth temperatures employed by MBE enable extremely high In-mole fraction InGaN. This is advantageous for growing thick, relaxed InGaN on compliant substrates for long-wavelength nitride-based optoelectronics. The simplicity of MBE, which does not use any metal-organic precursors or carrier gases, makes it suitable for proof-of-concept next generation devices. Composition pulling and Quantum Confined Stark Effect (QCSE) has severely limited nitride-based red LEDs to achieve the efficiencies shared by their blue and green counterparts. MOCVD grown elastically relaxed InGaN on porous GaN tiles have shown significant progress however they are limited due to the high density of V-defects on the surface. This work demonstrates MBE grown InGaN on porous GaN tiles with a surface free of V-defects which had an in-plane lattice constant equivalent to fully relaxed In0.12Ga0.88N. STEM analysis revealed no new dislocations in the InGaN layer demonstrating the compliant nature of the porous tile. This is a significant improvement from previous work by MOCVD. These MBE grown tiled pseudo-substrates may be a compelling technology for micro-LED displays.

Gallium Nitride has gained prominence in the field of power electronics due to its high bandgap, high critical electric field, high mobility and high saturation-drift velocity. This means that GaN can be used to make devices that have a low on-resistance along with a high breakdown voltage. High frequency GaN HEMTs have been commercially available since 2006 and still being improved. The high power market is just starting to tap into GaN devices. Vertical transistors are especially attractive for high power applications, as they provide the possibility of a high breakdown voltage at a low chip size, thus, a low cost price. In addition to this, GaN devices can also use the two-dimensional electron gas formed at the GaN/AlGaN heterojunction to obtain a higher current.

Several GaN based power devices are being investigated - both vertical and lateral. Our group has been focusing on the Oxide GaN-interlayer Field Effect Transistor (OGFET) and the Current Aperture Vertical Electron Transistor (CAVET). On the lateral side, power HEMTs are being developed. This work focuses on materials development for the various types of power devices. A primary motive for this thesis is for it to serve as a reference manual for researchers working on GaN power devices.

Vertical power devices are united by a common feature – a thick drift region with a low n-type carrier concentration. Through simulations, it has been shown that the optimal carrier concentration to simultaneously achieve a low Ron and a high breakdown voltage is about 1 x 1016 cm-3. Through our experiments, it was demonstrated that it is also the carrier concentration range where the electron mobility peaks. Achieving such a low doping can be problematic as it is in the range of impurity dopants such as Carbon and Oxygen. A low doping and record mobility was achieved for vertical devices by MOCVD and applied to the OGFET and the CAVET. Devices were grown both, on sapphire and on bulk GaN and high breakdown voltages were achieved.

Power devices require an elaborate growth and fabrication process, including regrowth on p-GaN doped by Magnesium and regrowth within trenches. Magnesium is known to diffuse into subsequent layers during regrowth, lowering device performance. A novel approach to circumvent this issue is presented, which can eliminate the need to remove the sample from the MOCVD chamber altogether. A low temperature GaN layer grown via flow modulation epitaxy successfully suppressed the Mg penetration at a rate of 5 nm/dec, the lowest ever by MOCVD, leading to the formation of an abrupt p-GaN:Mg/GaN junction.

Regrowth within trenches was optimized for different applications. GaN was grown conformally within narrow trenches by exploring various growth conditions. A complete filling of trench was also achieved for a different set of applications. Finally, conformal regrowth of high composition, low temperature AlGaN was optimized for deep-recessed gate HEMTs to lower gate leakage. All of these were planar regrowths and no masks were used.

InAlN has received significant attention due to its great potential for electronic and optoelectronic applications. In particular, $In_{0.18}Al_{0.82}N$ presents the advantage of being lattice-matched to GaN and simultaneously exhibiting a high spontaneous polarization charge, making $In_{0.18}Al_{0.82}N$ attractive for use as the barrier layer in high-electron-mobility transistors (HEMTs). However, in the case of InAlN growth by plasma-assisted molecular beam epitaxy (PAMBE), a strong non-uniformity in the in-plane In distribution was observed for both N-face and metal-face $In_{0.18}Al_{0.82}N$. This compositional inhomogeneity manifests itself as a columnar microstructure with AlN-rich cores (5-10 nm in width) and InN-rich intercolumn boundaries. Because of the large differences between the bandgaps and polarization of InN and AlN, this non-uniformity in InAlN composition could be a source of scattering, leading to mobility degradation in HEMTs.

In this work, the growth conditions for high quality lattice-matched InAlN layers on free-standing GaN substrates were explored by plasma-assisted molecular beam epitaxy (PAMBE) in the N-rich regime. The microstructure of N-face InAlN layers, lattice-matched to GaN, was investigated by scanning transmission electron microscopy and atom probe tomography. Microstructural analysis showed an absence of the lateral composition modulation that was previously observed in InAlN films grown by PAMBE. Using same growth conditions for InAlN layer, N-face GaN/AlN/GaN/InAlN high-electron-mobility transistors with lattice-matched InAlN back barriers were grown directly on SiC. A room temperature two-dimensional electron gas (2DEG) mobility of $1100\,cm^2V^{-1}s^{-1}$ and 2DEG sheet charge density of $1.9\times10^{13}\,cm^2$ was measured on these devices. However, the threading dislocation density (TDD) of GaN grown directly on SiC by PAMBE ($\approx2\times10^{10}\,cm^{-2}$) is two orders of magnitude higher than GaN grown by MOCVD on SiC or sapphire ($\approx5\times10^8\,cm^{-2}$). This high TDD can severely degrade the 2DEG mobility, especially at lower 2DEG sheet densities.

Relatively low TDD ($\approx5\times10^8\,cm^{-2}$) on MOCVD-grown GaN substrates motivated us to study the growth of N-face GaN-based HEMT structures with InAlN backbarriers on such substrates. Since on-axis GaN-on-sapphire substrates with low threading dislocation density are not available in the N-face orientation, we explored the growth of InAlN on vicinal ($4^{\circ}$ miscut along GaN $10\bar{1}0$) GaN-on-sapphire substrates. The microstructure of $In_{0.18}Al_{0.82}N$ layers grown by PAMBE at different temperatures was studied using scanning transmission electron microscopy (STEM). The cross-sectional and plan-view STEM images revealed lateral variations in the InAlN composition along $10\bar{1}0$ (perpendicular to the step edges), in addition to step bunching in InAlN layers thicker than 10 nm. N-face HEMTs with lattice-matched InAlN backbarriers were then grown on these vicinal substrates with different InAlN thicknesses.

Transmission line measurements showed that step bunching and lateral variation of InAlN composition degraded the 2DEG mobility in the directions parallel and perpendicular to the steps. A 2DEG charge density of $1.1\times10^{13}\,cm^{-2}$ and mobility of $1850\,cm^2V^{-1}s^{-1}$ were achieved on a GaN/AlN/InAlN/GaN structure with 7.5 nm thick $In_{0.18}Al_{0.82}N$. By designing a double backbarrier ($In_{0.18}Al_{0.82}N$(7.5 nm)/$Al_{0.57}Ga_{0.43}N$(7 nm)), a 2DEG charge density of $2\times10^{13}\,cm^{-2}$ and mobility of $1360\,cm^2V^{-1}s^{-1}$ were attained, which resulted in a sheet resistance of $230\,\Omega/\square$.

Two good measures of the device quality concerning the power loss in power switch and high frequency switch applications are Huang material figure of merit , and Baliga high-frequency figure of merit, respectively, which shows that for any fixed material system, power loss reduces by increasing the mobility of the 2DEG. Therefore, it is very important to understand the source of scattering mechanisms which affect the 2DEG mobility. In this work, we studied effect of decreasing channel thickness or increasing gate reverse bias on charge density and 2DEG mobility in N-face HEMT structure. Our calculations showed that increasing the gate reverse bias and decreasing the channel thickness both reduce the 2DEG mobility. This trend has been observed by experiment as well. Previously, it was believed that increasing the gate reverse bias or decreasing the channel thickness in N-face GaN-based HEMT structures lead to deeper penetration of the 2DEG wavefunction into the barrier, and consequently, higher interface roughness and alloy scattering rates. Although this statement is true, our calculations revealed that the penetration of the 2DEG into the barrier and, therefore, 2DEG mobility limited by alloy and interface roughness scattering mechanisms do not vary significantly by increasing gate reverse bias or decreasing the channel thickness. therefore, these two scattering mechanisms are not enough to explain the significant drop in the 2DEG mobility observed in experiments. We believe that the charged trap states at the AlGaN-GaN interface, where the 2DEG forms, are responsible for this 2DEG mobility reduction.

Gallium Nitride is widely employed for microwave and mm-wave applications. Though GaN HEMTs have primarily been used for power amplification, they are also well suited for receiver applications. In the receiver front-end, the linearity of an RF transistor is an important requisite. In a crowded wireless spectrum with large in band interferers, non-linearities can mask or distort a weak desired signal. At mm-wave frequencies and high data rates, circuit-level linearization techniques increase system complexity. Therefore, this study focuses on linearization at the device-level.

Traditionally, GaN is grown and fabricated in the Ga-polar orientation. In the N-polar orientation, the inverse polarization fields enable the implementation of device structures that provide excellent mm-wave performance. The devices presented in this work are based on N polar GaN MIS-HEMT technology and are designed to achieve high gain and high linearity performance, simultaneously. This dissertation reports the device architecture with a detailed description of the fabrication process, the challenges involved in device fabrication and the solutions explored to overcome them.

Device results including linearity characterization at 30 GHz are discussed. The linearity performance is described through OIP3 and OIP3/Pdc. An OIP3 of 32 dBm, OIP3/Pdc of 15 dB and 12.7 dB transducer gain at 30 GHz were obtained at a bias specific for high linearity. A strategy to achieve high linearity over a wide input bias range is to use derivative superposition at the device-level with a dual-threshold voltage device design. In this approach, the device transconductance (gm) is engineered to achieve a flat gm profile over a wide range of gate-bias. The results of the first demonstration of a dual-threshold voltage N-polar GaN transistor show 10.8 dB OIP3/Pdc, 34 dBm OIP3 and 11 dB transducer gain at 30 GHz.

There is a strong need for a large band gap pFET device with good performance for an efficient high voltage CMOS platform for power conversion applications. GaN is a leading choice of material for high power applications. GaN HEMTs are already commercially used in high power conversion systems. However, the performance of the GaN pFETs have not been attractive enough for a GaN based CMOS power conversion technology.Work in this dissertation focuses on improving the on-current of hole channel GaN transistors while maintaining normally off operation. Lower hole mobility requires a much higher hole channel charge to achieve an on-resistance of the same order as GaN HEMTs. One approach is to distribute the total carriers in multiple parallel channels and modulate these parallel channels independently. A Mg-doped GaN/AlGaN superlattice (SL) is one way to get multiple parallel hole channels. The effects of different superlattice parameters were studied using self-consistent Poisson-Schrodinger solver. Using MOCVD grown GaN/AlGaN superlattice, FinFET devices were designed, fabricated, and characterized. The first generation of devices employing MIS gate structure showed normally-on operation with >100 mA/mm. Next, Schottky gate structures were used to achieve normally-off operation. These devices used a dry etch induced sidewall tunnel junction contacts, which led to turn-on voltage in the device output characteristics. MOCVD regrown p+ GaN contact layer process was developed to remove this turn-on voltage. Both blanket and selective area regrown contact process were optimized. Finally, the regrown contact process was integrated with the FinFET process. MOCVD regrown contacts around the fins led to FinFET devices with normally-off operation, >60 mA/mm on-current and 42 V breakdown voltage.

(Al,Ga,In)N semiconductor materials are widely used in high-frequency, high-power electronics due to their wide bandgaps. Both metal- and N-polar AlGaN/GaN high-electron-mobility transistors (HEMTs) demonstrated excellent performances as high-frequency signal amplifiers. While the majority of today’s III-N transistors are based on metal-polar heterostructures, N-polar materials have gained attention following the breakthrough in the deposition of high quality films. Compared to their metal-polar counterparts, N-polar HEMT structures improve the scalability of devices, increase the electron confinement and reduce contact resistance, exhibiting great potentials in high-frequency device fabrications.

In order to suppress alloy scattering in the HEMT structures, a thin AlN interlayer is usually introduced between the AlGaN barrier and the GaN channel. However, a significant amount of unintentional Ga incorporation was observed in AlN films grown by metal-organic chemical vapor deposition (MOCVD), one of the major techniques to produce the HEMT epi structures. In the first part of my thesis, the impact of impure AlN interlayers on HEMTs was examined, explaining the significant improvement in electron mobility despite of the high Ga concentration of ~ 50%. Moreover, both metal-polar and N-polar AlN films grown by MOCVD under various conditions were investigated, the results of which indicated that the major source of unintentional Ga was the former Ga deposition on the susceptor in the same run. It was also observed that N-polar AlN films contained less Ga compared to metal-polar ones when they were grown under same conditions. Methods to suppress the Ga were also discussed. In addition, the morphological and electrical properties of the GaN/AlN/GaN heterostructures with AlN films grown under different conditions were analyzed by atomic force microscopy (AFM) and room temperature Van der Pauw hall measurement.

Following the study of AlN interlayers in the HEMT structures, the development of N-polar HEMT epitaxial structures with highly-scaled channel thicknesses was discussed in detail. Small channel thickness is critical to prevent short channel effects when scaling down the lateral size of N-polar HEMT devices. By modifying the Si doping level in the back-barrier and the Al composition of the AlGaN cap, the channel thickness of the conventional N-polar HEMT structure with pure GaN channel was successfully scaled down to 8 nm. To further reduce the channel thickness, a thin InGaN layer was introduced between the channel and the AlGaN cap, leading to a decrease of the electric field in the channel and an increase of the distance between the centroid of the 2DEG and the AlN/GaN interface, which suppressed the scattering at the interface and significantly improved the electron mobility. The sheet charge density also increased due to the net positive polarization charge at the GaN/InGaN interface. The design was demonstrated by MOCVD. An increase of 73% in electron mobility from 606 to 1141 cm2/(V·s) was observed when the 6 nm thick pure GaN channel was replaced by a 4 nm GaN / 2 nm In0.1Ga0.9N composite channel. The smallest applicable channel thickness was decreased to 4 nm with the composite channel design.