The increasing reliance on digital technologies and connected systems has amplified the need for securing sensitive information from a multitude of hardware security threats. Side-channel attacks, SAT attacks, and hardware Trojans pose significant risks to the integrity and confidentiality of devices ranging from smart cards to cloud computing infrastructures. The thesis provides a comprehensive analysis of these security threats, exploring their underlying principles, attack techniques, and existing countermeasures while focusing on the analysis of the countermeasures and future trends.

The study focuses on the evolution and impact of side-channel attacks addressing the exploitation of power, timing, electromagnetic, acoustic, and optical patterns, fault injection techniques, and physical characteristics of systems. The thesis delves into the increasing prominence of SAT attacks and the role of logic locking in preventing hardware security breaches throughout the global supply chain. In addition, the research investi- gates the threat of hardware Trojans in ASIC-specific AI/ML hardware accelerators and their potential consequences on the accuracy and reliability of ML models.

To counter these challenges, the thesis combines approaches and contributions from three works to develop robust countermeasures and security-aware Electronic Design Au- tomation (EDA) tools. The research aims to design and implement reconfigurable and interconnecting logic blocks using STT-MRAM-based LUTs and routing-based obfusca- tion, offering a reliable, low-power, and SAT-hard instance. The thesis also seeks to develop an EDA tool flow to automate the placement of lock blocks and security opti- mization, achieving security with minimal power and area overhead. Furthermore, the study surveys the current state-of-the-art AI/ML hardware accelerators, their inherent robustness to hardware errors, and their mitigation strategies, emphasizing the necessity for a multi-faceted approach to ensuring hardware system integrity.

By providing a comprehensive overview of hardware security threats and their counter- measures, this thesis contributes to the development of more secure cryptographic systems and AI/ML hardware accelerators highlighting the need for a multi-faceted approach to ensure hardware system integrity.