As transistor budgets grow enabling chip multi-core processors, adding hardware support to ensure the correctness and security of programs will be just as important, for the average user, as adding another core. The goal of our research is to develop hardware support for software checks and for multi-threaded synchronization that protects memory from corruption. This is the source of a significant number of bugs and security issues. We want efficient low-overhead run-time performance of these checks and synchronization so that it can be left on all of the time, even in production code releases. Bounds checking protects pointer and array accesses. It is the process of keeping track of the address boundaries for objects, and checking that the loads and stores do not stray outside bounds. It can serve two purposes: it can assist debugging by precisely capturing invalid memory accesses, and it can guarantee protection against buffer overflow attacks. Unfortunately, the high performance overhead of runtime bounds checking has prevented its inclusion in most released software. In this thesis, we analyze the sources of bounds checking overhead. We then consider hardware/software enhancements: the effect merging the check into a single instruction, software optimizations based on potential for overflow to eliminate checks, and changes to meta-data layout to limit copying overhead. Transactional Memories enable programmers to greatly simplify multithreaded code by eliminating lock synchronization and its attending deadlock and livelock problems. Unlike locks they also enable speculative concurrent execution through the critical section. Specialized transactional memory can also aid concurrent programming models by providing determinism only when needed at run-time. A key limitation of past transactional memory proposals are that they have a finite memory capacity. Virtualized transactional memory (unbounded in space and time) are desirable, as they can increase the scope of transactions’ use, and thereby further simplify a programmer’s job. In this thesis, we introduce Page-based Transactional Memory to support unbounded transactions. We combine transaction bookkeeping with the virtual memory system to support fast transaction conflict detection, commit, abort, and to maintain transactions’ speculative data.

Pre-2018 CSE ID: CS2006-0873

As transistor budgets grow enabling chip multi-core processors, adding hardware support to ensure the correctness and security of programs will be just as important, for the average user, as adding another core. The goal of our research is to develop hardware support for software checks and for multi-threaded synchronization that protects memory from corruption. This is the source of a significant number of bugs and security issues. We want efficient low-overhead run-time performance of these checks and synchronization so that it can be left on all of the time, even in production code releases. Bounds checking protects pointer and array accesses. It is the process of keeping track of the address boundaries for objects, and checking that the loads and stores do not stray outside bounds. It can serve two purposes: it can assist debugging by precisely capturing invalid memory accesses, and it can guarantee protection against buffer overflow attacks. Unfortunately, the high performance overhead of runtime bounds checking has prevented its inclusion in most released software. In this thesis, we analyze the sources of bounds checking overhead. We then consider hardware/software enhancements: the effect merging the check into a single instruction, software optimizations based on potential for over to eliminate checks, and changes to meta-data layout to limit copying overhead. Transactional Memories enable programmers to greatly simplify multithreaded code by eliminating lock synchronization and its attending deadlock and livelock problems. Unlike locks they also enable speculative concurrent execution through the critical section. Specialized transactional memory can also aid concurrent programming models by providing determinism only when needed at run-time. A key limitation of past transactional memory proposals are that they have a finite memory capacity. Virtualized transactional memory (unbounded in space and time) are desirable, as they can increase the scope of transactions' use, and thereby further simplify a programmer's job. In this thesis, we introduce Page-based Transactional Memory to support unbounded transactions. We combine transaction bookkeeping with the virtual memory system to support fast transaction conflict detection, commit, abort, and to maintain transactions' speculative data

Bounds checking can be used to significantly increase software quality control and security. Bounds checking is the process of keeping track of the address boundaries for an object, buffer, or array, and checking loads and stores that access that structure to make sure that they do not stray outside of the bounds. Run-time bounds checking for C has resulted in high overheads. This has prevented its inclusion in most released software due to its overhead, and has limited it to being used for just debugging. In this paper we examine several approaches to reduce this overhead for general purpose C programs. We first examine code generation optimizations to generate efficient code using x86 bounds instruction which incurs about 36% performance overhead which is a significant reduction over baseline bounds checking compiler which incurs about a 73% overhead. Then we evaluate the performance of x86 bound instruction on two different processors and examine what the bound checking overhead should be with an efficient x86 bound implementation. Finally we examine two compiler optimization techniques focused at performing bounds checking only for accesses to strings and at interfaces which are traditional targets for buffer overflow attacks. For these two approaches, the overhead incurred is about 20% on an average.

Pre-2018 CSE ID: CS2004-0805

Transactions have emerged as a promising way to exploit thread-level parallelism in the presence of shared data. Preventing data-races between threads traditionally implies lock-based synchronization. This comes at the risk of deadlock due to programmer error, and overly-conservative locking will limit the performance potential of parallel execution. Transactions circumvent these limitations by detecting and serializing data dependencies between threads at runtime without the need for locks. Hardware supported transactional memory builds on top of the cache coherence mechanism of shared memory multi-processors to detect data dependence conflicts between concurrent transactions. Recent proposals address the need to support the virtualization of transactions when the finite capacity of the cache is exceeded. These techniques have either a fast commit or abort, but not both. Similarly they support either fast conflict detection but are not able to handle swapped processes, or slow but complete. In this paper we examine page-based transactional memory to provide virtual transactions. We combine transaction bookkeeping with page address translation for fast conflict detection with fast access of overflowed transactional data. Our approach provides fast virtual transaction commit and abort, and conflict detection. We provide quantitative measurement of performance, whereas most examinations of virtualized transaction techniques provide only theoretical analysis of performance.

Pre-2018 CSE ID: CS2005-0848